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Embedded Licensing

AGM’s Tensor processing unit (TPU) is inferencing ASIC logic core built with dedicated logic(full custom) including systolic matrix computation interacting with fast memory, controller, and software such as configuration and commanding feeder software.  Deployed technologies such as math and memory functions are derived and optimized ASIC from volume shipping FPGA products.


Convolution computational core (array size) is scalable by requests. The configuration software is able to also serve as limited functions as full-mask tapeout's metal changes .


The licensing ASIC core is dedicated high computation power and low power consumption, suited for integration into SoC products.

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